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Design, verification and lab validation of Nx100G bridge block as part of a VLSI/Chip development.

Design scope includes architecture development, verilog coding and synthesis.

Verification scope includes verification architecture development, component development using System Verilog and test case development.

The project is designed to provide interns an opportunity to build from scratch and experience various phases of VLSI development. Lab validation includes implementing the design in an FPGA, check it for interop with routers/test sets.

Role:

In this role, you will work with the verification lead to complete verification tasks.

What you will be doing:

*Work with verification lead, to identify test cases based on requirements

*Participate in the review of the verification Plan

*Identify new verification requirements, review them and implement them to create a verification environment

*Implement test cases, modify or create verification components

*Work with verification and design team to meet coverage goals

Contributions at a group level

*Develop and own specific verification components which are use across projects

*Work with team members in implementing new verification strategies or verification methodologies

Requirements:

Strong digital design fundamentals

Good knowledge of System Verilog for verification using UVM methodologies

Hands on experience in test coding, running, debug and coverage closure

Candidate must have a Bachelor's Degree or higher in CS or EE with good academics. Masters degree preferred.

Infinera,Bengaluru - (Now part of Nokia)

Station Overview

Project 1

FD Lock and HD CO

Project 2

ASIC Design , Verification